A semiconductor memory includes electrode structures that each includes horizontal electrodes stacked on each other a substrate, vertical electrodes between the electrode structures and extending along the horizontal electrodes, first contacts connected to the horizontal electrodes at end portions of the electrode structures, second contacts connected to upper portions of the vertical electrodes, and a first interconnection structure connected to top surfaces of the second contacts. The first interconnection structure includes first and second sub-interconnection lines. The sub-interconnection lines extend in a first direction and contact the top surfaces of the second contacts. The second sub-interconnection lines extended in a second direction crossing the first direction and contact the first sub-interconnection lines.