Invention Grant
- Patent Title: SRAM with burst mode operation
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Application No.: US17144077Application Date: 2021-01-07
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Publication No.: US11527282B2Publication Date: 2022-12-13
- Inventor: Changho Jung , Keejong Kim , Chulmin Jung , Ritu Chaba
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone LLP
- Main IPC: G11C11/419
- IPC: G11C11/419 ; G11C7/08 ; G11C7/10 ; G11C7/12 ; G11C7/22 ; G11C8/08 ; G11C8/10 ; G11C11/418

Abstract:
A memory is provided that is configured to practice both a conventional normal read operation and also a burst mode read operation. During the normal read operation, the memory pre-charges the bit lines in a group of multiplexed columns. Each column has a sense amplifier that latches a bit decision for the column during the normal read operation. If a subsequent read operation addresses the same group of multiplexed columns, the memory invokes the burst-mode read operation during which the bit lines are not pre-charged.
Public/Granted literature
- US20210134358A1 SRAM WITH BURST MODE OPERATION Public/Granted day:2021-05-06
Information query
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