Invention Grant
- Patent Title: PMOSFET source drain
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Application No.: US17021765Application Date: 2020-09-15
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Publication No.: US11532711B2Publication Date: 2022-12-20
- Inventor: Cheng-Ting Chung , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/167 ; H01L29/165 ; H01L29/66 ; H01L29/06

Abstract:
A semiconductor device according to the present disclosure includes a first source/drain epitaxial feature and a second source/drain epitaxial feature each having an outer liner layer and an inner filler layer, a plurality of channel members extending between the first source/drain epitaxial feature and the second source/drain epitaxial feature along a first direction, and a gate structure disposed over and around the plurality of channel members. The plurality of channel members are in contact with the outer liner layer and are spaced apart from the inner filler layer. The outer liner layer comprises germanium and boron and the inner filler layer comprises germanium and gallium.
Public/Granted literature
- US20210328020A1 PMOSFET Source Drain Public/Granted day:2021-10-21
Information query
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