A semiconductor device according to an embodiment includes a plurality of element arrays, a signal-processing circuit, and a comparison-voltage generation circuit. Each element array is selectively connected to a vertical signal line and includes an amplification transistor configured to output a first analog signal on the basis of an input analog voltage and an actual value of variation of a characteristic value of each element array included in the plurality of element arrays. The comparison-voltage generation circuit is configured to output a gradually increasing or gradually decreasing comparison voltage. The signal-processing circuit includes a storage circuit and is configured to compare the first analog signal with the comparison voltage and store a timing at which the comparison voltage and a value of a second analog signal generated by adding a predetermined absolute value to the first analog signal match each other onto the storage circuit.