Invention Grant
- Patent Title: Accelerating constrained, flexible, and optimizable rule look-ups in hardware
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Application No.: US17085805Application Date: 2020-10-30
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Publication No.: US11561607B2Publication Date: 2023-01-24
- Inventor: Catherine Graves , Can Li , John Paul Strachan , Dejan S. Milojicic , Kimberly Keeton
- Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Applicant Address: US TX Houston
- Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Current Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Current Assignee Address: US TX Houston
- Agency: Sheppard Mullin Richter & Hampton LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G06F1/3296 ; G11C13/00 ; G06F1/3206 ; G11C27/00

Abstract:
Encoding of domain logic rules in an analog content addressable memory (aCAM) is disclosed. By encoding domain logic in an aCAM, rapid and flexible search capabilities are enabled, including the capability to search ranges of analog values, fuzzy match capabilities, and optimized parameter search capabilities. This is achieved with low latency by using only a small number of clock cycles at low power. A domain logic ruleset may be represented using various data structures such as decision trees, directed graphs, or the like. These representations can be converted to a table of values, where each table column can be directly mapped to a corresponding row of the aCAM.
Public/Granted literature
- US20220138204A1 ACCELERATING CONSTRAINED, FLEXIBLE, AND OPTIMIZABLE RULE LOOK-UPS IN HARDWARE Public/Granted day:2022-05-05
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