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1.发明公开公开(公告)号：US20240020155A1
公开(公告)日：2024-01-18
申请号：US18476690
申请日：2023-09-28
CPC分类号： G06F9/4881 , G06F9/505 , G06F9/5044 , G06F9/5005 , G06F9/5055
摘要： Systems and methods are provided for incorporating an optimized dispatcher with an FaaS infrastructure to permit and restrict access to resources. For example, the dispatcher may assign requests to “warm” resources and initiate a fault process if the resource is overloaded or a cache-miss is identified (e.g., by restarting or rebooting the resource). The warm instances or accelerators associated with the allocation size that are identified may be commensurate to the demand and help dynamically route requests to faster accelerators.
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公开(公告)号：US11561607B2
公开(公告)日：2023-01-24
申请号：US17085805
申请日：2020-10-30
IPC分类号： G11C16/04 , G06F1/3296 , G11C13/00 , G06F1/3206 , G11C27/00
摘要： Encoding of domain logic rules in an analog content addressable memory (aCAM) is disclosed. By encoding domain logic in an aCAM, rapid and flexible search capabilities are enabled, including the capability to search ranges of analog values, fuzzy match capabilities, and optimized parameter search capabilities. This is achieved with low latency by using only a small number of clock cycles at low power. A domain logic ruleset may be represented using various data structures such as decision trees, directed graphs, or the like. These representations can be converted to a table of values, where each table column can be directly mapped to a corresponding row of the aCAM.
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3.发明授权公开(公告)号：US11294763B2
公开(公告)日：2022-04-05
申请号：US16115100
申请日：2018-08-28
发明人： John Paul Strachan , Catherine Graves , Dejan S. Milojicic , Paolo Faraboschi , Martin Foltin , Sergey Serebryakov
摘要： A computer system includes multiple memory array components that include respective analog memory arrays which are sequenced to implement a multi-layer process. An error array data structure is obtained for at least a first memory array component, and from which a determination is made as to whether individual nodes (or cells) of the error array data structure are significant. A determination can be made as to any remedial operations that can be performed to mitigate errors of significance.
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公开(公告)号：US11182134B2
公开(公告)日：2021-11-23
申请号：US16799637
申请日：2020-02-24
摘要： Systems and methods are provided for optimizing parameters of a system across an entire stack, including algorithms layer, toolchain layer, execution or runtime layer, and hardware layer. Results from the layer-specific optimization functions of each domain can be consolidated using one or more consolidation optimization functions to consolidate the layer-specific optimization results, capturing the relationship between the different layers of the stack. Continuous monitoring of the programming model during execution may be implemented and can enable the programming model to self-adjust based on real-time performance metrics. In this way, programmers and system administrators are relieved of the need for domain knowledge and are offered a systematic way for continuous optimization (rather than an ad hoc approach).
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公开(公告)号：US10983831B2
公开(公告)日：2021-04-20
申请号：US16058506
申请日：2018-08-08
摘要： Examples relate to firmware-based provisioning of hardware resources. In some of the examples, firmware discovers and takes ownership of a hardware resource. At this stage, the firmware performs a test to verify the hardware resource. The firmware then assigns the hardware resource to an OS instance. At this stage, the firmware can suspend assigning further hardware resources to the OS instance in response to a satisfied notification from the OS instance.
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公开(公告)号：US20200050493A1
公开(公告)日：2020-02-13
申请号：US16058506
申请日：2018-08-08
IPC分类号： G06F9/50 , G06F9/48 , G06F9/54 , G06F9/4401 , G06F11/22
摘要： Examples relate to firmware-based provisioning of hardware resources. In some of the examples, firmware discovers and takes ownership of a hardware resource. At this stage, the firmware performs a test to verify the hardware resource. The firmware then assigns the hardware resource to an OS instance. At this stage, the firmware can suspend assigning further hardware resources to the OS instance in response to a satisfied notification from the OS instance.
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公开(公告)号：US10545909B2
公开(公告)日：2020-01-28
申请号：US15305405
申请日：2014-04-29
IPC分类号： G06F15/167 , H04L29/08
摘要： A system management command is stored in a management partition of a global memory by a first node of a multi-node computing system. The global memory is shared by each node of the multi-node computing system. In response to an indication to access the management partition, the system management command is accessed from the management partition by a second node of the multi-node computing system. The system management command is executed by the second node. Executing the system management command includes managing the second node.
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公开(公告)号：US20190332538A1
公开(公告)日：2019-10-31
申请号：US15967596
申请日：2018-04-30
IPC分类号： G06F12/0837
摘要： Systems and methods for dynamically modifying coherence domains are discussed herein. In various embodiments, a hardware controller may be provided that is configured to automatically recognize application behavior and dynamically reconfigure coherence domains in hardware and software to tradeoff performance for reliability and scalability. Modifying the coherence domains may comprise repartitioning the system based on cache coherence independently of one or more software layers of the system. Memory-driven algorithms may be invoked to determine one or more dynamic coherence domain operations to implement. In some embodiments, declarative policy statements may be received from a user via one or more interfaces associated with the controller. The controller may be configured to dynamically adjust cache coherence policy based on the declarative policy statements received from the user.
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公开(公告)号：US10261882B2
公开(公告)日：2019-04-16
申请号：US15114086
申请日：2014-01-31
发明人： Dejan S. Milojicic , Yuan Chen , Daniel J. Gmach , Vanish Talwar , Zhikui Wang
IPC分类号： G06F11/30 , G06F1/3287 , G06F9/50 , G06F1/3215 , G06F1/3296 , G06F11/34
摘要： A system comprises a plurality of functional units powered via a power source. The system further comprises a first functional unit and a second functional unit, wherein the second functional unit is to promote the first functional unit to a management unit based on a management requirement of the system. The management unit is to administrate operations of the system. Once the first functional unit is promoted, the management unit is isolated from the functional units that were not promoted via a virtual network path and a power management unit.
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公开(公告)号：US20180367581A1
公开(公告)日：2018-12-20
申请号：US15625172
申请日：2017-06-16
发明人： Yuan Chen , Dejan S. Milojicic , Jack Yanxin Li
IPC分类号： H04L29/06 , H04L29/08 , H04L12/927 , H04L12/26
摘要： Example implementations relate to scaling a processing system. An example implementation includes receiving an application having a number of operators for performing a service in the processing system. A metric of the processing system may be monitored while the application runs, and the processing system may be scaled where the metric surpasses a threshold. In an example, the processing system may be scaled by increasing or decreasing the number of operators of the application.
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