Invention Grant
- Patent Title: Rinsing cache lines from a common memory page to memory
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Application No.: US15839089Application Date: 2017-12-12
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Publication No.: US11561906B2Publication Date: 2023-01-24
- Inventor: William L. Walker , William E. Jones
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F12/12
- IPC: G06F12/12 ; G06F12/128 ; G06F12/0882

Abstract:
A processing system rinses, from a cache, those cache lines that share the same memory page as a cache line identified for eviction. A cache controller of the processing system identifies a cache line as scheduled for eviction. In response, the cache controller, identifies additional “dirty victim” cache lines (cache lines that have been modified at the cache and not yet written back to memory) that are associated with the same memory page, and writes each of the identified cache lines to the same memory page. By writing each of the dirty victim cache lines associated with the memory page to memory, the processing system reduces memory overhead and improves processing efficiency.
Public/Granted literature
- US20190179770A1 RINSING CACHE LINES FROM A COMMON MEMORY PAGE TO MEMORY Public/Granted day:2019-06-13
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