- Patent Title: Structure and formation method of chip package with through vias
-
Application No.: US16893119Application Date: 2020-06-04
-
Publication No.: US11569159B2Publication Date: 2023-01-31
- Inventor: Ling-Wei Li , Jung-Hua Chang , Cheng-Lin Huang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L21/683 ; H01L25/10

Abstract:
A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate. The conductive structure has a lower portion and an upper portion, and the upper portion is wider than the lower portion. The method also includes disposing a semiconductor die over the carrier substrate. The method further includes forming a protective layer to surround the conductive structure and the semiconductor die. In addition, the method includes forming a conductive bump over the conductive structure. The lower portion of the conductive structure is between the conductive bump and the upper portion of the conductive structure.
Public/Granted literature
- US20210066179A1 STRUCTURE AND FORMATION METHOD OF CHIP PACKAGE WITH THROUGH VIAS Public/Granted day:2021-03-04
Information query
IPC分类: