Invention Grant
- Patent Title: Semiconductor device including vertical memory structure
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Application No.: US17036034Application Date: 2020-09-29
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Publication No.: US11569262B2Publication Date: 2023-01-31
- Inventor: Janggn Yun , Jaeduk Lee , Dongwhee Kwon
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2019-0142089 20191107
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/24 ; H01L23/535 ; H01L27/11556

Abstract:
A semiconductor device includes a first stacked structure and a second stacked structure spaced apart from each other on a substrate, and a plurality of separation structures and a plurality of vertical memory structures alternately arranged between the first stacked structure and the second stacked structure in a first direction parallel to an upper surface of the substrate. Each of the first and second stacked structures includes a plurality of interlayer insulating layers and a plurality of gate layers alternately repeatedly stacked on the lower structure. Each of the vertical memory structures includes a first data storage structure facing the first stacked structure and a second data storage structure facing the second stacked structure. Side surfaces of the first and second stacked structures facing the vertical memory structures are concave in a plan view.
Public/Granted literature
- US20210143172A1 SEMICONDUCTOR DEVICE INCLUDING VERTICAL MEMORY STRUCTURE Public/Granted day:2021-05-13
Information query
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