- Patent Title: Efficient management of failed memory blocks in memory sub-systems
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Application No.: US16947975Application Date: 2020-08-26
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Publication No.: US11579968B2Publication Date: 2023-02-14
- Inventor: Tyler L. Betz , Andrew M. Kowles , Adam J. Hieb
- Applicant: Micron Technology Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology Inc.
- Current Assignee: Micron Technology Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F11/10 ; G06F11/07

Abstract:
Disclosed is a system including a memory device having a plurality of physical memory segments and a processing device to perform operations that include, responsive to detecting a failure of a memory operation associated with a physical memory segment of the plurality of physical memory segments, quarantining the physical memory segment, responsive to quarantining the physical memory segment, performing one or more scanning operations on the physical memory segment, and determining, based on results of the one or more scanning operations, a viability status of the physical memory segment, wherein the viability status indicates an ability of the physical memory segment to store data.
Public/Granted literature
- US20220066868A1 EFFICIENT MANAGEMENT OF FAILED MEMORY BLOCKS IN MEMORY SUB-SYSTEMS Public/Granted day:2022-03-03
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