Invention Grant
- Patent Title: System and methods for programming nonvolatile memory having partial select gate drains
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Application No.: US17335909Application Date: 2021-06-01
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Publication No.: US11581049B2Publication Date: 2023-02-14
- Inventor: Kazuki Isozumi , Parth Amin , Sayako Nagamine , Anubhav Khandelwal
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Dickinson Wright PLLC
- Agent Steven C. Hurles
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/10 ; G11C29/52 ; G11C16/08 ; G11C29/12

Abstract:
Apparatus and methods are described to reduce program disturb for a memory string with a partial select gate drain, which is partially cut by a shallow trench. The memory string with a partial select gate drain is linked with a neighboring full select gate drain that during its programming can cause a program disturb in the memory string with a partial select gate drain. The bias voltage applied to the selected full select gate drain can be controlled from a high state for low memory program states to a lower state for the high memory program states. The high data states may cause program disturb. The reduction in the bias voltage can match a reduction in the bias voltage applied to the bit lines to reduce the program disturb while providing adequate signal to program the high states on the memory string of the full select gate drain.
Public/Granted literature
- US20220383967A1 SYSTEM AND METHODS FOR PROGRAMMING NONVOLATILE MEMORY HAVING PARTIAL SELECT GATE DRAINS Public/Granted day:2022-12-01
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