Methods, systems, and devices for driving word lines using sub word line drivers are described. A memory array may include a plurality of sub-arrays arranged with gaps in between. Word lines may be arranged across multiple sub-arrays and drive access transistors that are used to selectively access rows (e.g., rows of memory cells) within the sub-arrays. In some examples, signals applied to selection devices driving the word lines may be over-driven for a duration at or near the desired transitions of the word line, and some signals may be driven to a relatively high level for a duration around the high and low transitions of a global row line. Whether a signal is over driven or driven to a relatively high level may depend on the type or types of transistors used in each word line driver.