公开(公告)号：US20240274180A1

公开(公告)日：2024-08-15

申请号：US18581260

申请日：2024-02-19

申请人： Micron Technology, Inc.

发明人： Yuan He ,  Tae H. Kim ,  Scott James Derner

IPC分类号： G11C11/22

CPC分类号： G11C11/2273 ,  G11C11/221 ,  G11C11/2255 ,  G11C11/2257

摘要： Methods, systems, and devices for sensing a memory with shared sense components are described. A device may activate a word line and a plate line each coupled with a set of memory cells, where each memory cell of the set of memory cells is coupled with a respective digit line of a set of digit lines. The device may activate a set of switching components to couple each digit line of the set of digit lines with a respective sense component of a set of sense components, where each switching component of the set of switching components is coupled with a respective memory cell of the set of memory cells. The device may sense the set of memory cells based on activating the word line and the plate line and based on coupling the set of digit lines with the set of sense components.

公开(公告)号：US20240071469A1

公开(公告)日：2024-02-29

申请号：US17894089

申请日：2022-08-23

申请人： Micron Technology, Inc.

发明人： Tae H. Kim

IPC分类号： G11C11/408 ,  G11C11/4074 ,  G11C11/4093

CPC分类号： G11C11/4085 ,  G11C11/4074 ,  G11C11/4093

摘要： Memory with single transistor sub-word line drivers, and associated systems, devices, and methods are disclosed herein. In one embodiment, an apparatus comprises a plurality of first sub-word line drivers and a plurality of second sub-word line drivers. Each sub-word line driver of the plurality of first sub-word line drivers is coupled to (a) a first global word line and (b) a corresponding one of a plurality of first local word lines. Each sub-word line driver of the plurality of second sub-word line drivers is coupled to (a) a second global word line different from the first global word line and (b) a corresponding one of a plurality of second local word lines. In addition, individual ones of the plurality of first local word lines are interleaved with individual ones of the plurality of second local word lines.

公开(公告)号：US11915735B2

公开(公告)日：2024-02-27

申请号：US18048738

申请日：2022-10-21

申请人： Micron Technology, Inc.

发明人： Yuan He ,  Tae H. Kim ,  Scott James Derner

IPC分类号： G11C11/22

CPC分类号： G11C11/2273 ,  G11C11/221 ,  G11C11/2255 ,  G11C11/2257

摘要： Methods, systems, and devices for sensing a memory with shared sense components are described. A device may activate a word line and a plate line each coupled with a set of memory cells, where each memory cell of the set of memory cells is coupled with a respective digit line of a set of digit lines. The device may activate a set of switching components to couple each digit line of the set of digit lines with a respective sense component of a set of sense components, where each switching component of the set of switching components is coupled with a respective memory cell of the set of memory cells. The device may sense the set of memory cells based on activating the word line and the plate line and based on coupling the set of digit lines with the set of sense components.

公开(公告)号：US20220254405A1

公开(公告)日：2022-08-11

申请号：US17697483

申请日：2022-03-17

申请人： Micron Technology, Inc.

发明人： Tae H. Kim ,  Brenton P. Van Leeuwen

IPC分类号： G11C11/408 ,  G11C11/22

摘要： Methods, systems, and devices for driving word lines using sub word line drivers are described. A memory array may include a plurality of sub-arrays arranged with gaps in between. Word lines may be arranged across multiple sub-arrays and drive access transistors that are used to selectively access rows (e.g., rows of memory cells) within the sub-arrays. In some examples, signals applied to selection devices driving the word lines may be over-driven for a duration at or near the desired transitions of the word line, and some signals may be driven to a relatively high level for a duration around the high and low transitions of a global row line. Whether a signal is over driven or driven to a relatively high level may depend on the type or types of transistors used in each word line driver.

公开(公告)号：US20220254397A1

公开(公告)日：2022-08-11

申请号：US17171873

申请日：2021-02-09

申请人： Micron Technology, Inc.

发明人： Yuan He ,  Tae H. Kim ,  Scott James Demer

IPC分类号： G11C11/22

摘要： Methods, systems, and devices for sensing a memory with shared sense components are described. A device may activate a word line and a plate line each coupled with a set of memory cells, where each memory cell of the set of memory cells is coupled with a respective digit line of a set of digit lines. The device may activate a set of switching components to couple each digit line of the set of digit lines with a respective sense component of a set of sense components, where each switching component of the set of switching components is coupled with a respective memory cell of the set of memory cells. The device may sense the set of memory cells based on activating the word line and the plate line and based on coupling the set of digit lines with the set of sense components.

公开(公告)号：US11386948B1

公开(公告)日：2022-07-12

申请号：US17172163

申请日：2021-02-10

申请人： Micron Technology, Inc.

发明人： Yuan He ,  Tae H. Kim

IPC分类号： G11C8/00 ,  G11C11/4091 ,  G11C11/4096 ,  H03K19/173 ,  G11C5/06 ,  G11C11/404

摘要： A sense amplifier can be formed outside of/horizontally adjacent to an array of vertically stacked tiers of memory cells. Memory cells can be sensed via multiplexors formed under the array that can operate to couple vertical sense lines (to which the memory cells are coupled) to horizontal sense lines (to which the sense amplifier is coupled).

公开(公告)号：US11222680B2

公开(公告)日：2022-01-11

申请号：US17097738

申请日：2020-11-13

申请人： Micron Technology, Inc.

发明人： Tae H. Kim ,  Corrado Villa

IPC分类号： G11C11/22 ,  G06F1/3234 ,  G06F1/3287 ,  G06F1/3296

摘要： Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. An electronic memory device may include a plurality of plate portions separated by a plurality of segmentation lines, which may be oriented in a plane parallel to rows of a memory array or columns of the memory array, or both. The segmented plate may be employed instead of a single plate for the array. The one or more plate portions may be energized during access operations of a ferroelectric cell in order to create a voltage different across the cell or to facilitate changing the charge of the cell. Each of the plate portions may include one or more memory cells. The memory cells on a plate portion may be read from or written to after the plate portion is activated by a plate driver.

公开(公告)号：US20210134341A1

公开(公告)日：2021-05-06

申请号：US17097738

申请日：2020-11-13

申请人： Micron Technology, Inc.

发明人： Tae H. Kim ,  Corrado Villa

IPC分类号： G11C11/22 ,  G06F1/3234 ,  G06F1/3287 ,  G06F1/3296

摘要： Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. An electronic memory device may include a plurality of plate portions separated by a plurality of segmentation lines, which may be oriented in a plane parallel to rows of a memory array or columns of the memory array, or both. The segmented plate may be employed instead of a single plate for the array. The one or more plate portions may be energized during access operations of a ferroelectric cell in order to create a voltage different across the cell or to facilitate changing the charge of the cell. Each of the plate portions may include one or more memory cells. The memory cells on a plate portion may be read from or written to after the plate portion is activated by a plate driver.

公开(公告)号：US20210090636A1

公开(公告)日：2021-03-25

申请号：US17114404

申请日：2020-12-07

申请人： Micron Technology, Inc.

发明人： Christopher J. Kawamura ,  Charles L. Ingalls ,  Tae H. Kim

IPC分类号： G11C11/408 ,  G11C11/4076

摘要： An apparatus includes a plurality of main word line circuits. Each main word line circuit drives a respective global word line to one of an active state value, an intermediate voltage state, or a pre-charge state. The intermediate voltage state voltage is below the active state voltage and above the pre-charge state voltage. The memory device also includes a plurality of sub-word line drivers. Each sub-word line driver is connected to a corresponding global word line and configured to drive a respective local word line between the corresponding global word line voltage and a low voltage value. The apparatus further includes a plurality of phase drivers. Each phase driver is connected to a predetermined number of sub-word line drivers, where each of the predetermined number of sub-word line drivers connects to a different global word line.

公开(公告)号：US20190287605A1

公开(公告)日：2019-09-19

申请号：US16431500

申请日：2019-06-04

申请人： Micron Technology, Inc.

发明人： Tae H. Kim ,  Sangmin Hwang ,  Si-Woo Lee

IPC分类号： G11C11/4091 ,  G11C11/22 ,  G11C11/4097

摘要： Some embodiments include an apparatus having first and second comparative bitlines extending horizontally and coupled with a sense amplifier. First memory cell structures are coupled with the first comparative bitline. Each of the first memory cell structures has a first transistor associated with a first capacitor. Second memory cell structures are coupled with the second comparative bitline. Each of the second memory cell structures has a second transistor associated with a second capacitor. Each of the first capacitors has a container-shaped first node and is vertically offset from an associated first sister capacitor which is a mirror image of its associated first capacitor along a horizontal plane. Each of the second capacitors has a container-shaped first node and is vertically offset from an associated second sister capacitor which is a mirror image of its associated second capacitor along the horizontal plane.