Invention Grant
- Patent Title: Method to achieve active p-type layer/layers in III-nitrtde epitaxial or device structures having buried p-type layers
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Application No.: US16092165Application Date: 2017-04-11
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Publication No.: US11588096B2Publication Date: 2023-02-21
- Inventor: Yuuki Enatsu , Chirag Gupta , Stacia Keller , Umesh K. Mishra , Anchal Agarwal
- Applicant: The Regents of the University of California
- Applicant Address: US CA Oakland
- Assignee: The Regents of the University of California
- Current Assignee: The Regents of the University of California
- Current Assignee Address: US CA Oakland
- Agency: Gates & Cooper LLP
- International Application: PCT/US2017/027025 WO 20170411
- International Announcement: WO2017/180633 WO 20171019
- Main IPC: H01L41/18
- IPC: H01L41/18 ; H01L33/08 ; H01L29/36 ; H01L29/861 ; H01L29/20 ; H01L29/205 ; H01L21/00 ; H01L41/107 ; H01L21/02
Abstract:
An optoelectronic or electronic device structure, including an active region on or above a polar substrate, wherein the active region comprises a polar p region. The device structure further includes a hole supply region on or above the active region. Holes in the hole supply region are driven by a field into the active region, the field arising at least in part due to a piezoelectric and/or spontaneous polarization field generated by a composition and grading of the active region.
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Information query
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