Embodiments include a resistive random access memory (RRAM) storage cell, having a resistive switching material layer and a semiconductor layer between two electrodes, where the semiconductor layer serves as an OEL. In addition, the RRAM storage cell may be coupled with a transistor to form a RRAM memory cell. The RRAM memory cell may include a semiconductor layer as a channel for the transistor, and also shared with the storage cell as an OEL for the storage cell. A shared electrode may serve as a source electrode of the transistor and an electrode of the storage cell. In some embodiments, a dielectric layer may be shared between the transistor and the storage cell, where the dielectric layer is a resistive switching material layer of the storage cell.