Invention Grant
- Patent Title: Vertical memory with simplified integration
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Application No.: US16752141Application Date: 2020-01-24
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Publication No.: US11600632B2Publication Date: 2023-03-07
- Inventor: Jisung Cheon , Seokcheon Baek
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2019-0073611 20190620
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/1157

Abstract:
A vertical memory device is provided including a first structure on a substrate. The first structure includes gate patterns spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate to form a plurality of layers. A second structure is connected to the first structure. The second structure includes pad patterns electrically connected to the gate patterns of a respective one of the layers. A channel structure passes through the gate patterns. A first contact plug passes through the second structure and electrically connects with a pad pattern of one of the layers. The first contact plug is electrically insulated from gate patterns of other layers. At least one bent portion is included at each of a sidewall of the channel structure and a sidewall of the first contact plug.
Information query
IPC分类: