Invention Grant
- Patent Title: High voltage semiconductor device including buried oxide layer and method for forming the same
-
Application No.: US17109153Application Date: 2020-12-02
-
Publication No.: US11626515B2Publication Date: 2023-04-11
- Inventor: Sheng-Yao Huang , Yu-Ruei Chen , Zen-Jay Tsai , Yu-Hsiang Lin
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: CN202011177946.7 20201029
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L29/06 ; H01L29/66 ; H01L21/28 ; H01L21/8234 ; H01L29/423 ; H01L27/088
Abstract:
A semiconductor structure includes a substrate, a buried oxide layer formed in the substrate and near a surface of the substrate, a gate dielectric layer formed on the substrate and covering the buried oxide layer, a gate structure formed on the gate dielectric layer and overlapping the buried oxide layer, and a source region and a drain region formed in the substrate and at two sides of the gate structure.
Public/Granted literature
- US20220140139A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME Public/Granted day:2022-05-05
Information query
IPC分类:
