A semiconductor structure includes first and second source/drain (S/D) features, one or more channel layers connecting the first and the second S/D features, a high-k metal gate engaging the one or more channel layers, an isolation structure, a power rail under the isolation structure, and a via structure extending through the isolation structure and electrically connecting the first S/D feature and the power rail. At least a portion of the isolation structure is under the first and the second S/D features. In a cross-section that extends through the first S/D feature and perpendicular to a direction from the first S/D feature to the second S/D feature along the one or more channel layers, the via structure extends into a gap vertically between the first S/D feature and the isolation structure.