Invention Grant
- Patent Title: Semiconductor device including via and wiring
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Application No.: US17648829Application Date: 2022-01-25
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Publication No.: US11637065B2Publication Date: 2023-04-25
- Inventor: Miji Lee , Taeyoung Jeong , Yoonkyeong Jo , Sangwoo Pae , Hwasung Rhee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Myers Bigel, P.A.
- Priority: KR10-2019-0096700 20190808
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/522 ; H01L21/768 ; H01L23/532 ; H01L29/417 ; H01L29/78

Abstract:
A semiconductor device includes a lower wiring, an upper wiring on the lower wiring, and a via between the lower wiring and the upper wiring. The lower wiring has a first end surface and a second end surface opposing each other, the upper wiring has a third end surface and a fourth end surface opposing each other, and the via has a first side adjacent to the second end surface of the lower wiring and a second side adjacent to the third end surface of the upper wiring. A distance between a lower end of the first side of the via and an upper end of the second end surface of the lower wiring is less than ⅓ of a width of a top surface of the via, and a distance between an upper end of the second side of the via and an upper end of the third end surface of the upper wiring is less than ⅓ of the width of the top surface of the via.
Public/Granted literature
- US20220148965A1 SEMICONDUCTOR DEVICE INCLUDING VIA AND WIRING Public/Granted day:2022-05-12
Information query
IPC分类: