公开(公告)号：US11637065B2

公开(公告)日：2023-04-25

申请号：US17648829

申请日：2022-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Miji Lee ,  Taeyoung Jeong ,  Yoonkyeong Jo ,  Sangwoo Pae ,  Hwasung Rhee

IPC: H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L29/417 ,  H01L29/78

Abstract: A semiconductor device includes a lower wiring, an upper wiring on the lower wiring, and a via between the lower wiring and the upper wiring. The lower wiring has a first end surface and a second end surface opposing each other, the upper wiring has a third end surface and a fourth end surface opposing each other, and the via has a first side adjacent to the second end surface of the lower wiring and a second side adjacent to the third end surface of the upper wiring. A distance between a lower end of the first side of the via and an upper end of the second end surface of the lower wiring is less than ⅓ of a width of a top surface of the via, and a distance between an upper end of the second side of the via and an upper end of the third end surface of the upper wiring is less than ⅓ of the width of the top surface of the via.

公开(公告)号：US11239162B2

公开(公告)日：2022-02-01

申请号：US16877945

申请日：2020-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Miji Lee ,  Taeyoung Jeong ,  Yoonkyeong Jo ,  Sangwoo Pae ,  Hwasung Rhee

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/417 ,  H01L21/768 ,  H01L29/78

Abstract: A semiconductor device includes a lower wiring, an upper wiring on the lower wiring, and a via between the lower wiring and the upper wiring. The lower wiring has a first end surface and a second end surface opposing each other, the upper wiring has a third end surface and a fourth end surface opposing each other, and the via has a first side adjacent to the second end surface of the lower wiring and a second side adjacent to the third end surface of the upper wiring. A distance between a lower end of the first side of the via and an upper end of the second end surface of the lower wiring is less than ⅓ of a width of a top surface of the via, and a distance between an upper end of the second side of the via and an upper end of the third end surface of the upper wiring is less than ⅓ of the width of the top surface of the via.