- 专利标题: Interconnect structures and methods of fabrication thereof
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申请号: US17144724申请日: 2021-01-08
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公开(公告)号: US11640936B2公开(公告)日: 2023-05-02
- 发明人: Chao-Hsun Wang , Wang-Jung Hsueh , Fu-Kai Yang , Mei-Yun Wang , Sheng-Hsiung Wang , Shih-Hsien Huang
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L23/522
- IPC分类号: H01L23/522 ; H01L23/532 ; H01L29/40 ; H01L21/768 ; H01L21/321 ; H01L23/528
摘要:
A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a first source/drain contact and a second source/drain contact spaced apart by a gate structure, an etch stop layer (ESL) over the first source/drain contact and the second source/drain contact, a conductive feature disposed in the etch stop layer and in direct contact with the first source/drain contact and the second source/drain contact, a dielectric layer over the etch stop layer, and a contact via extending through the dielectric layer and electrically connected to the conductive feature. By providing the conductive feature, a number of metal lines in an interconnect structure of the semiconductor structure may be advantageously reduced.
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