Invention Grant
- Patent Title: Method of manufacturing an integrated circuit involving performing an electrostatic discharge test and electrostatic discharge test system performing the same
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Application No.: US17342241Application Date: 2021-06-08
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Publication No.: US11650237B2Publication Date: 2023-05-16
- Inventor: Bonggyu Kang , Youngsoo Jang , Heesu Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Muir Patent Law, PLLC
- Priority: KR 20200122530 2020.09.22
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R3/00 ; G01R23/163 ; G01R31/28

Abstract:
In a method of manufacturing an integrated circuit involving performing an electrostatic discharge (ESD) test, a weak frequency band is detected by sequentially radiating a plurality of first electromagnetic waves on a first test board including the integrated circuit. First peak-to-peak voltage signals are detected by sequentially radiating the plurality of first electromagnetic waves on a second test board including an electromagnetic wave receiving module. A frequency spectrum is detected by radiating a second electromagnetic wave on a housing including a third test board including the electromagnetic wave receiving module. A second peak-to-peak voltage signal is generated based on the weak frequency band, the first peak-to-peak voltage signals and the frequency spectrum. An ESD characteristic associated with an electronic system including the integrated circuit is predicted based on the second peak-to-peak voltage signal.
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