Invention Grant
- Patent Title: Interface circuit for providing extension packet and processor including the same
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Application No.: US17466742Application Date: 2021-09-03
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Publication No.: US11659070B2Publication Date: 2023-05-23
- Inventor: Younho Jeon , Hyeokjun Choe , Jeongho Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR 20200146196 2020.11.04
- Main IPC: H04L69/22
- IPC: H04L69/22 ; H04L69/04 ; H04L69/08

Abstract:
An interface circuit includes: a packet transmitter configured to generate a plurality of transmission packets based on a request, which is output from a core circuit, and output the plurality of transmission packets, the plurality of transmission packets including information indicative of being a packet to be merged; and a packet receiver configured to generate a merged packet by merging a plurality of extension packets from among a plurality of reception packets received from outside the interface circuit, the plurality of extension packets including information indicative of being a packet to be merged.
Public/Granted literature
- US20220141322A1 INTERFACE CIRCUIT FOR PROVIDING EXTENSION PACKET AND PROCESSOR INCLUDING THE SAME Public/Granted day:2022-05-05
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