Invention Grant
- Patent Title: Lithography method using multiscale simulation, and method of manufacturing semiconductor device and exposure equipment based on the lithography method
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Application No.: US17672937Application Date: 2022-02-16
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Publication No.: US11662665B2Publication Date: 2023-05-30
- Inventor: Byunghoon Lee , Maenghyo Cho , Changyoung Jeong , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.,Seoul National University R&DB Foundation
- Current Assignee: Samsung Electronics Co., Ltd.,Seoul National University R&DB Foundation
- Current Assignee Address: KR Gyeonggi-do; KR Seoul
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR 20210056221 2021.04.30
- Main IPC: G03F7/20
- IPC: G03F7/20 ; H01L21/027 ; G03F7/40 ; G05B19/4099 ; G06F30/25

Abstract:
A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.
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