Invention Grant
- Patent Title: Column redundancy techniques
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Application No.: US17375887Application Date: 2021-07-14
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Publication No.: US11664086B2Publication Date: 2023-05-30
- Inventor: Yew Keong Chong , Andy Wangkun Chen , Bikas Maiti , Vivek Nautiyal
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Pramudji Law Group PLLC
- Agent Ari Pramudji
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C7/10 ; G11C29/18

Abstract:
Various implementations described herein are directed to a device having memory architecture with an array of memory cells arranged in multiple columns with redundancy including first columns of memory cells disposed in a first region along with second columns of memory cells and redundancy columns of memory cells disposed in a second region that is laterally opposite the first region. The device may have column shifting logic that is configured to receive data from the multiple columns, shift the data from the first columns in the first region to a first set of the redundancy columns in the second region, and shift data from the second columns in the second region to a second set of the redundancy columns in the second region.
Public/Granted literature
- US20230016339A1 Column Redundancy Techniques Public/Granted day:2023-01-19
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