- Patent Title: Technologies for coordinating access to data packets in a memory
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Application No.: US15185864Application Date: 2016-06-17
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Publication No.: US11671382B2Publication Date: 2023-06-06
- Inventor: John J. Browne , Seán Harte , Tomasz Kantecki , Pierre Laurent , Chris MacNamara
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: H04N21/443
- IPC: H04N21/443 ; H04L49/9057 ; H04N21/426 ; H04L49/103 ; H04L1/00 ; H04L49/102 ; H04L49/00 ; H04L49/9005 ; H04N21/232

Abstract:
Technologies for coordinating access to packets include a network device. The network device is to establish a ring in a memory of the network device. The ring includes a plurality of slots. The network device is also to allocate cores to each of an input stage, an output stage, and a worker stage. The worker stage is to process data in a data packet with an associated worker function. The network device is also to add, with the input stage, an entry to a slot in the ring representative of a data packet received with a network interface controller of the network device, access, with the worker stage, the entry in the ring to process at least a portion of the data packet, and provide, with the output stage, the processed data packet to the network interface controller for transmission.
Public/Granted literature
- US20170366477A1 TECHNOLOGIES FOR COORDINATING ACCESS TO DATA PACKETS IN A MEMORY Public/Granted day:2017-12-21
Information query
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