Invention Grant
- Patent Title: Semiconductor die package with warpage management and process for forming such
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Application No.: US16557891Application Date: 2019-08-30
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Publication No.: US11676876B2Publication Date: 2023-06-13
- Inventor: Ziyin Lin , Elizabeth Nofen , Vipul Mehta , Taylor Gaines
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L21/56 ; H01L23/367 ; H01L23/373 ; H01L21/67
Abstract:
A device is disclosed. The device includes a first die, a plurality of chiplets above the first die, a first underfill material beneath the chiplets, and a gap fill material between the chiplets. The gap fill material is different from the first underfill material. An interface region is formed between the first underfill material and the gap fill material.
Public/Granted literature
- US20210066152A1 SEMICONDUCTOR DIE PACKAGE WITH WARPAGE MANAGEMENT AND PROCESS FOR FORMING SUCH Public/Granted day:2021-03-04
Information query
IPC分类:
