Invention Grant
- Patent Title: Manufacturing method of chip package and chip package
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Application No.: US17373773Application Date: 2021-07-13
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Publication No.: US11705368B2Publication Date: 2023-07-18
- Inventor: Chia-Sheng Lin , Hui-Hsien Wu , Jian-Hong Chen , Tsang-Yu Liu , Kuei-Wei Chen
- Applicant: XINTEC INC.
- Applicant Address: TW Taoyuan
- Assignee: XINTEC INC.
- Current Assignee: XINTEC INC.
- Current Assignee Address: TW Taoyuan
- Agency: Liu & Liu
- The original application number of the division: US16668570 2019.10.30
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/00 ; H01L21/02

Abstract:
A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.
Public/Granted literature
- US20210343591A1 MANUFACTURING METHOD OF CHIP PACKAGE AND CHIP PACKAGE Public/Granted day:2021-11-04
Information query
IPC分类: