Invention Grant
- Patent Title: Back-gate biasing of clock trees using a reference generator
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Application No.: US17526830Application Date: 2021-11-15
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Publication No.: US11705903B2Publication Date: 2023-07-18
- Inventor: Alain Rousson , Hui Song , Ravi Shivnaraine , Christopher Holdenried , Hector Villacorta
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lowenstein Sandler LLP
- Main IPC: H03K19/003
- IPC: H03K19/003 ; H03K19/00 ; H03K19/0185
Abstract:
The embodiments herein describe technologies for back-gate biasing of clock trees using a reference generator. A circuit includes a set of clock buffers and a programmable voltage reference generator to apply a voltage to a back gate of a transistor of the set of clock buffers.
Public/Granted literature
- US20220158637A1 BACK-GATE BIASING OF CLOCK TREES USING A REFERENCE GENERATOR Public/Granted day:2022-05-19
Information query
