Invention Grant
- Patent Title: Patterning a transparent wafer to form an alignment mark in the transparent wafer
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Application No.: US16884437Application Date: 2020-05-27
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Publication No.: US11721637B2Publication Date: 2023-08-08
- Inventor: Xin-Hua Huang , Ping-Yin Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L23/00 ; B23Q17/22 ; H01L21/18 ; H01L21/68

Abstract:
In some embodiments, the present disclosure relates to an integrated chip that includes bonding structure arranged directly between a first substrate and a second substrate. The first substrate includes a first transparent material and a first alignment mark. The first alignment mark is arranged on an outer region of the first substrate and also includes the first transparent material. The first alignment mark is defined by surfaces of the first substrate that are arranged between an uppermost surface of the first substrate and a lowermost surface of the first substrate. The second substrate includes a second alignment mark on an outer region of the second substrate. The second alignment mark directly underlies the first alignment mark, and the bonding structure is arranged directly between the first alignment mark and the second alignment mark.
Public/Granted literature
- US20210375780A1 PATTERNING A TRANSPARENT WAFER TO FORM AN ALIGNMENT MARK IN THE TRANSPARENT WAFER Public/Granted day:2021-12-02
Information query
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