Invention Grant
- Patent Title: Integrate stressor with Ge photodiode using a substrate removal process
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Application No.: US17103792Application Date: 2020-11-24
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Publication No.: US11742451B2Publication Date: 2023-08-29
- Inventor: Xunyuan Zhang , Li Li , Prakash B. Gothoskar , Soha Namnabat
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L31/18
- IPC: H01L31/18 ; H01L31/0368 ; H01L31/105 ; H01L31/036

Abstract:
The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
Public/Granted literature
- US20220165907A1 INTEGRATE STRESSOR WITH GE PHOTODIODE USING A SUBSTRATE REMOVAL PROCESS Public/Granted day:2022-05-26
Information query
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