- 专利标题： Method for manufacturing metal oxide semiconductor transistor
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申请号： US17226097申请日： 2021-04-09
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公开(公告)号： US11756839B2公开(公告)日： 2023-09-12
- 发明人: Wan-Yan Lin , Yu-Chieh Su , Ming-Chien Chiu , Mao-Hsing Chiu
- 申请人： Powerchip Semiconductor Manufacturing Corporation
- 申请人地址： TW Hsinchu
- 专利权人： Powerchip Semiconductor Manufacturing Corporation
- 当前专利权人： Powerchip Semiconductor Manufacturing Corporation
- 当前专利权人地址： TW Hsinchu
- 代理机构： JCIPRNET
- 优先权： TW 0100060 2021.01.04
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238 ; H01L29/66
摘要：
A method for manufacturing a MOS transistor includes following. A gate stack structure and a hardmask layer on the gate stack structure are sequentially formed on a substrate. A first spacer is formed on sidewalls of the gate stack structure and the hardmask layer. A photoresist layer is formed on a sidewall of the first spacer. A top surface of the photoresist layer is higher than a top surface of the gate stack structure. The hardmask layer and a portion of the first spacer are removed to expose the top surface of the gate stack structure. A top surface of a remaining first spacer is higher than the top surface of the gate stack structure. The photoresist layer is removed. A second spacer is formed on a sidewall of the remaining first spacer. A top surface of the second spacer is higher than the top surface of the gate stack.
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