Invention Grant
- Patent Title: Method for manufacturing a semiconductor package
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Application No.: US17752796Application Date: 2022-05-24
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Publication No.: US11756926B2Publication Date: 2023-09-12
- Inventor: Shun Sing Liao
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: FOLEY & LARDNER LLP
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L23/00 ; H01L21/56 ; H01L23/498

Abstract:
A method for manufacturing a semiconductor package includes: (a) providing a substrate structure, wherein the substrate structure includes a chip attach area, a bottom area opposite to the chip attach area, a lower side rail surrounding the bottom area, a first lower structure and a second lower structure, wherein the first lower structure is disposed in a first lower region of the lower side rail, and a second lower occupancy ratio is greater than a first lower occupancy ratio; (b) attaching at least one semiconductor chip to the chip attach area; and (c) forming an encapsulant to cover the at least one semiconductor chip.
Public/Granted literature
- US20220285313A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE Public/Granted day:2022-09-08
Information query
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