Invention Grant
- Patent Title: Bonded assembly of a memory die and a logic die including laterally shifted bit-line bonding pads and methods of forming the same
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Application No.: US17315938Application Date: 2021-05-10
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Publication No.: US11758730B2Publication Date: 2023-09-12
- Inventor: Fumiaki Toyama , Jee-Yeon Kim
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: THE MARBURY LAW GROUP PLLC
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H10B43/40 ; G11C11/408 ; H10B43/27

Abstract:
A bonded assembly of a memory die and a logic die is provided. The memory die includes a memory array, a plurality of bit lines, and memory-side bit-line-connection bonding pads. The logic die includes sense amplifiers located in a sense amplifier region, and logic-side bit-line-connection bonding pads located within the sense amplifier region and bonded to a respective one of the memory-side bit-line-connection bonding pads. The sense amplifier region has an areal overlap with a respective first subset the plurality of bit lines in a plan view, while a second subset of the plurality of bit lines does not have an areal overlap with the sense amplifier region in the plan view.
Public/Granted literature
Information query
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