- Patent Title: Updates to flash memory based on determinations of bits to erase
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Application No.: US17419736Application Date: 2019-07-31
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Publication No.: US11762575B2Publication Date: 2023-09-19
- Inventor: Mark A. Piwonka , Stanley Hyojun Park , Michael R. Durham , Ted T. Nguy
- Applicant: Hewlett-Packard Development Company, L.P.
- Applicant Address: US TX Spring
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Spring
- Agency: Quarles & Brady LLP
- International Application: PCT/US2019/044371 2019.07.31
- International Announcement: WO2021/021161A 2021.02.04
- Date entered country: 2021-06-30
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F8/654 ; G06F12/0891

Abstract:
An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.
Public/Granted literature
- US20220155990A1 UPDATES TO FLASH MEMORY BASED ON DETERMINATIONS OF BITS TO ERASE Public/Granted day:2022-05-19
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