Invention Grant
- Patent Title: Method for semiconductor die edge protection and semiconductor die separation
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Application No.: US16923754Application Date: 2020-07-08
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Publication No.: US11764096B2Publication Date: 2023-09-19
- Inventor: Brandon P. Wirz , Andrew M. Bayless
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L21/48 ; H01L23/48

Abstract:
Methods for protecting edges of semiconductor dies are disclosed. Further, the disclosed methods provide for separating the semiconductor dies without using a dicing technique. In one embodiment, a plurality of trenches may be formed on a front side of a substrate including a plurality of semiconductor dies. Individual trenches may correspond to scribe lines of the substrate where each trench includes a depth greater than a final thickness of the semiconductor dies. A dielectric layer may be formed on sidewalls of the trenches, thereby protecting the edges of the semiconductor dies, prior to filling the trenches with an adhesive material. Subsequently, the substrate may be thinned from a back side such that the adhesive material in the trenches may be exposed from the back side. The adhesive material may be removed to singulate individual semiconductor dies of the plurality from the substrate.
Public/Granted literature
- US20220013401A1 METHOD FOR SEMICONDUCTOR DIE EDGE PROTECTION AND SEMICONDUCTOR DIE SEPARATION Public/Granted day:2022-01-13
Information query
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