Invention Grant
- Patent Title: Semiconductor die edge protection for semiconductor device assemblies and associated systems and methods
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Application No.: US17231210Application Date: 2021-04-15
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Publication No.: US11776908B2Publication Date: 2023-10-03
- Inventor: Brandon P. Wirz , Andrew M. Bayless
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/532 ; H01L25/00 ; H01L23/31 ; H01L21/78 ; H01L25/065

Abstract:
Semiconductor dies with edges protected and methods for generating the semiconductor dies are disclosed. Further, the disclosed methods provide for separating the semiconductor dies without using a dicing technique. In one embodiment, trenches are formed on a front side of a substrate including semiconductor dies. Individual trenches correspond to scribe lines of the substrate where each trench has a depth greater than a final thickness of the semiconductor dies. A composite layer may be formed on sidewalls of the trenches to protect the edges of the semiconductor dies. The composite layer includes a metallic layer that shields the semiconductor dies from electromagnetic interference. Subsequently, the substrate may be thinned from a back side to singulate individual semiconductor dies from the substrate.
Public/Granted literature
- US20220336366A1 SEMICONDUCTOR DIE EDGE PROTECTION FOR SEMICONDUCTOR DEVICE ASSEMBLIES AND ASSOCIATED SYSTEMS AND METHODS Public/Granted day:2022-10-20
Information query
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