Invention Grant
- Patent Title: Semiconductor device having buried logic conductor type of complementary field effect transistor, method of forming same
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Application No.: US17840430Application Date: 2022-06-14
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Publication No.: US11776958B2Publication Date: 2023-10-03
- Inventor: Guo-Huei Wu , Pochun Wang , Chih-Liang Chen , Li-Chun Tien
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; G06F30/392 ; G06F30/31 ; H01L21/8238 ; H01L23/522 ; H01L23/528 ; G06F111/02
Abstract:
A semiconductor device includes a buried communication (com) conductor (BC) CFET including: first and second active regions arranged in a stack according to CFET-type configuration; a first layer of metallization (M_1st layer) over the stack which includes first conductors configured for data or control signals (communication (com) conductors), and power grid (PG) conductors; and a layer of metallization (M_B layer) below the stack and which includes second com conductors.
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