Invention Grant
- Patent Title: Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
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Application No.: US17355301Application Date: 2021-06-23
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Publication No.: US11784128B2Publication Date: 2023-10-10
- Inventor: Robert Alan May , Kristof Darmawikarta , Sri Ranga Sai Sai Boyapati
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L23/29 ; H01L23/522 ; H01L23/538 ; H01L23/00 ; H01L23/50

Abstract:
A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
Public/Granted literature
- US20210320066A1 Die Interconnect Substrate, an Electrical Device and a Method for Forming a Die Interconnect Substrate Public/Granted day:2021-10-14
Information query
IPC分类: