Invention Grant
- Patent Title: Dual sided fan-out package having low warpage across all temperatures
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Application No.: US17585392Application Date: 2022-01-26
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Publication No.: US11784166B2Publication Date: 2023-10-10
- Inventor: Chan H. Yoo , Mark E. Tuttle
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- The original application number of the division: US15686024 2017.08.24
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L21/683 ; H01L23/00 ; H01L23/31

Abstract:
Semiconductor devices including a dual-sided redistribution structure and having low-warpage across all temperatures and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die electrically coupled to a first side of a redistribution structure and a second semiconductor die electrically coupled to a second side of the redistribution structure opposite the first side. The semiconductor device also includes a first molded material on the first side, a second molded material on the second side, and conductive columns electrically coupled to the first side and extending through the first molded material. The first and second molded materials can have the same volume and/or coefficients of thermal expansion to inhibit warpage of the semiconductor device.
Public/Granted literature
- US20220149014A1 DUAL SIDED FAN-OUT PACKAGE HAVING LOW WARPAGE ACROSS ALL TEMPERATURES Public/Granted day:2022-05-12
Information query
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