Invention Grant
- Patent Title: Methods of manufacturing semiconductor packages
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Application No.: US17835768Application Date: 2022-06-08
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Publication No.: US11798889B2Publication Date: 2023-10-24
- Inventor: Choongbin Yim , Jungwoo Kim , Jihwang Kim , Jongbo Shim , Kyoungsei Choi
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Myers Bigel, P.A.
- Priority: KR 20190164801 2019.12.11
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/31 ; H01L23/14

Abstract:
A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a molding layer covering side walls of the first semiconductor chip and including through holes, an interposer on the first semiconductor chip and the molding layer, conductive connectors in the through holes of the molding layer and connected to the first package substrate and the interposer, and an insulating filler including a first portion that fills the through holes of the molding layer so as to surround side walls of the conductive connectors.
Public/Granted literature
- US20220302035A1 SEMICONDUCTOR PACKAGE WITH INTERPOSER Public/Granted day:2022-09-22
Information query
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