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    SEMICONDUCTOR PACKAGE, AND PACKAGE ON PACKAGE HAVING THE SAME
    1.
    发明申请
    SEMICONDUCTOR PACKAGE, AND PACKAGE ON PACKAGE HAVING THE SAME 有权

    公开(公告)号：US20210257305A1

    公开(公告)日：2021-08-19

    申请号：US17024852

    申请日：2020-09-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choongbin Yim ,  Jungwoo Kim ,  Jihwang Kim ,  Jungsoo Byun ,  Jongbo SHIM ,  Doohwan Lee ,  Kyoungsei Choi ,  Junggon Choi ,  Sungeun Pyo

    IPC: H01L23/538 ,  H01L25/10

    Abstract: A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.

    SEMICONDUCTOR PACKAGE INCLUDING AN EMBEDDED SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE INCLUDING AN EMBEDDED SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210050297A1

    公开(公告)日：2021-02-18

    申请号：US16849629

    申请日：2020-04-15

    Applicant: Samsung Electronics Co., Ltd

    Inventor： Jihwang Kim ,  Jeongmin Kang ,  Hyunkyu Kim ,  Jongbo Shim ,  Kyoungsei Choi

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/498

    Abstract: A semiconductor package is provided including a package substrate. The package substrate includes a substrate pattern and a substrate insulation layer at least partially surrounding the substrate pattern. The package substrate has a groove. An external connection terminal is disposed below the package substrate. An embedded semiconductor device is disposed within the groove of the package substrate. The embedded semiconductor device includes a first substrate. A first active layer is disposed on the first substrate. A first chip pad is disposed on the first active layer. A buried insulation layer is disposed within the groove of the package substrate and at least partially surrounds at least a portion of a lateral surface of the embedded semiconductor device. A mounted semiconductor device is disposed on the package substrate and is connected to the package substrate and the embedded semiconductor device.

    Stacked image sensor package and stacked image sensor module including the same
    5.
    发明授权
    Stacked image sensor package and stacked image sensor module including the same 有权

    公开(公告)号：US10262971B2

    公开(公告)日：2019-04-16

    申请号：US15469837

    申请日：2017-03-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Un-Byoung Kang ,  Yungcheol Kong ,  Kyoungsei Choi

    IPC: H01L25/04 ,  H01L23/49 ,  H01L23/528 ,  H01L27/146

    Abstract: Provided are a stacked image sensor package and a packaging method thereof. A stacked image sensor package includes: a stacked image sensor in which a pixel array die and a logic die are stacked; a redistribution layer formed on one surface of the stacked image sensor, rerouting an input/output of the stacked image sensor, and including a first pad and a second pad; a memory die connected with the first pad of the redistribution layer and positioned on the stacked image sensor; and external connectors connected with the second pad, connecting the memory die and the stacked image sensor with an external device, and having the memory die positioned therebetween.

    Semiconductor package with interposer
    8.
    发明授权
    Semiconductor package with interposer 有权

    公开(公告)号：US11367688B2

    公开(公告)日：2022-06-21

    申请号：US17090502

    申请日：2020-11-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Choongbin Yim ,  Jungwoo Kim ,  Jihwang Kim ,  Jongbo Shim ,  Kyoungsei Choi

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/14

    Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a molding layer covering side walls of the first semiconductor chip and including through holes, an interposer on the first semiconductor chip and the molding layer, conductive connectors in the through holes of the molding layer and connected to the first package substrate and the interposer, and an insulating filler including a first portion that fills the through holes of the molding layer so as to surround side walls of the conductive connectors.

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