Invention Grant
- Patent Title: Semiconductor integrated circuit device and inspection method for semiconductor integrated circuit device
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Application No.: US17594431Application Date: 2020-04-03
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Publication No.: US11808807B2Publication Date: 2023-11-07
- Inventor: Akeo Satoh , Kazunori Nemoto , Akira Kotabe
- Applicant: Hitachi Astemo, Ltd.
- Applicant Address: JP Hitachinaka
- Assignee: Hitachi Astemo, Ltd.
- Current Assignee: Hitachi Astemo, Ltd.
- Current Assignee Address: JP Hitachinaka
- Agency: Crowell & Moring LLP
- Priority: JP 19081653 2019.04.23
- International Application: PCT/JP2020/015285 2020.04.03
- International Announcement: WO2020/217925A 2020.10.29
- Date entered country: 2021-10-15
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A semiconductor integrated circuit device and an inspection method for a semiconductor integrated circuit device capable of improving burn-in screening quality by improvement in an activation rate of a DSP without operating a diagnostic circuit at the time of wafer level burn-in in a semiconductor integrated circuit device incorporating an analog circuit and the diagnostic circuit for the analog circuit are provided.
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