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公开(公告)号：US12104938B2
公开(公告)日：2024-10-01
申请号：US17594851
申请日：2020-04-17
Applicant: Hitachi Astemo, Ltd.
Inventor： Masahiro Matsumoto , Hiroshi Nakano , Akira Kotabe
Abstract: An air flow rate meter includes a signal detector and a pulse generator. The signal detector is configured to detect that an output signal from the air flow rate detection element has passed a predetermined threshold. The pulse generator generates a pulse signal by using an output signal from the signal detector as a trigger. An output signal from the air flow rate detection element is corrected based on an output of the pulse generator.
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公开(公告)号：US12013421B2
公开(公告)日：2024-06-18
申请号：US17285403
申请日：2019-10-11
Applicant: Hitachi Astemo, Ltd.
Inventor： Tatsuo Nakagawa , Akeo Satoh , Akira Kotabe
IPC: G01R19/165
CPC classification number: G01R19/16576
Abstract: An electronic circuit including an output circuit capable of reducing breakage while satisfying the characteristics of an output signal is provided. For this purpose, the electronic circuit includes output signal generation elements 201 and 202 configured to generate an output signal, switches 203 and 204, and a voltage monitor circuit 205 configured to monitor a voltage applied to an output terminal 112. Here, the output signal generation elements 201 and 202 are connected to the output terminal 112 via the switches 203 and 204, and the voltage monitor circuit 205 is configured to be able to measure a voltage higher than a power supply voltage VDD connected to the output signal generation element 201 and controls the switches 203 and 204 so as to disconnect the output signal generation elements 201 and 202 and the output terminal 112 when the voltage of the output terminal 112 becomes equal to or higher than a predetermined value set higher than the power supply voltage VDD.
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公开(公告)号：US11808807B2
公开(公告)日：2023-11-07
申请号：US17594431
申请日：2020-04-03
Applicant: Hitachi Astemo, Ltd.
Inventor： Akeo Satoh , Kazunori Nemoto , Akira Kotabe
IPC: G01R31/28
CPC classification number: G01R31/2879
Abstract: A semiconductor integrated circuit device and an inspection method for a semiconductor integrated circuit device capable of improving burn-in screening quality by improvement in an activation rate of a DSP without operating a diagnostic circuit at the time of wafer level burn-in in a semiconductor integrated circuit device incorporating an analog circuit and the diagnostic circuit for the analog circuit are provided.
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Patent Agency Ranking
公开(公告)号：US12196822B2
公开(公告)日：2025-01-14
申请号：US17925643
申请日：2021-01-29
Applicant: Hitachi Astemo, Ltd.
Inventor： Tomoki Takamoto , Akeo Satoh , Akira Kotabe
Abstract: An object of the present invention is to provide a semiconductor device capable of diagnosing disconnection of a signal line that transmits a command signal in an inspection process even if the command signal is assumed not to be transmitted in the inspection process. A semiconductor device according to the present invention includes a first semiconductor integrated circuit and a control circuit, the control circuit includes a means for controlling a signal line in response to a response signal from the first semiconductor integrated circuit, and the control circuit further includes a means for controlling the signal line regardless of a signal from the first semiconductor integrated circuit.
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公开(公告)号：US11271554B2
公开(公告)日：2022-03-08
申请号：US17286243
申请日：2019-09-13
Applicant: Hitachi Astemo, Ltd.
Inventor： Akeo Satoh , Akira Kotabe , Tatsuo Nakagawa
IPC: H03B1/00 , H03K3/00 , H03K5/1252 , H03K17/687
Abstract: To prevent an output of an intermediate potential by suppressing sneaking of a current from a signal line to a power line at the time of disconnection of a power supply. A control circuit which receives a power supply voltage from a power line L11 and outputs an output signal to a signal line L12 includes: a load R11 which is provided between the power line and the signal line; a first transistor P11 which is provided between the load and the signal line; a second transistor P12 which is provided between a well of the first transistor and the power line; and a gate control circuit 15 which connects a gate terminal of the first transistor and a gate terminal of the second transistor to the signal line and turns off the first transistor and the second transistor, at the time of disconnection of a power supply.
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公开(公告)号：US12047062B2
公开(公告)日：2024-07-23
申请号：US17595051
申请日：2020-04-03
Applicant: Hitachi Astemo, Ltd.
Inventor： Tatsuo Nakagawa , Akeo Satoh , Akira Kotabe
IPC: H03K17/687 , G01R31/50
CPC classification number: H03K17/6871 , G01R31/50
Abstract: An electronic circuit that recognizes a disconnected state from an outside during disconnection of a power supply line is provided. For this purpose, an electronic circuit includes: a load provided between a power supply line and an output terminal in the electronic circuit; a transistor provided between the load and the output terminal; a current generation circuit that generates current using a power supply voltage at a power supply line in the electronic circuit; and a control circuit that controls the transistor using a control voltage that changes according to the current generated by the current generation circuit.
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公开(公告)号：US12174649B2
公开(公告)日：2024-12-24
申请号：US17288974
申请日：2019-10-23
Applicant: Hitachi Astemo, Ltd.
Inventor： Masahiro Matsumoto , Hiroshi Nakano , Akira Kotabe
Abstract: In a conventional electronic device, it is difficult to passively diagnose disconnection of an external capacitor added to an output terminal of a regulator circuit. An electronic device in this embodiment includes a regulator circuit 2 that outputs a constant voltage while external power supplied from the outside is input thereto, an external capacitor 3 connected to an output terminal of the regulator circuit 2 as an external component, an oscillation detector 4 that detects an oscillating state of the output voltage of the regulator circuit 2, and a failure determination unit 5 that outputs a failure signal when the oscillation detector 4 detects the oscillating state of the regulator circuit.
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公开(公告)号：US11768682B2
公开(公告)日：2023-09-26
申请号：US17628460
申请日：2020-07-14
Applicant: Hitachi Astemo, Ltd.
Inventor： Takahiro Yamamoto , Takahiro Miki , Akira Kotabe
CPC classification number: G06F9/3001 , G06F9/3004 , G06F9/3555
Abstract: A physical quantity detection device that can improve arithmetic resolution while preventing an increase in memory capacity is obtained. A physical quantity detection device 100 according to the present invention includes: a physical quantity detection sensor that detects a physical quantity of a measurement target gas; a storage unit that records a correction amount corresponding to a detection value of the physical quantity detection sensor; and an arithmetic unit 110 that performs output adjustment of the detection value using the detection value and the correction amount. Resolution of the storage unit 120 is lower than arithmetic resolution of the arithmetic unit 110.
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