Invention Grant
- Patent Title: Timing system including a master device and at least a slave device synchronized with each other and related synchronization method
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Application No.: US17839813Application Date: 2022-06-14
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Publication No.: US11817864B2Publication Date: 2023-11-14
- Inventor: Luigi Sole , Antonio Giordano
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Slater Matsil, LLP
- Priority: IT 2021000016841 2021.06.28
- Main IPC: H03L7/099
- IPC: H03L7/099 ; G06F1/08 ; G06F1/12

Abstract:
In an embodiment a timing system includes a master timing device including a master oscillator stage configured to receive a reference signal and to generate a first main clock signal frequency-locked with the reference signal, a master timing stage including a master counter configured to update value with a timing that depends on the first main clock signal, the master timing stage configured to generate a first local clock signal of a pulsed type, a timing of pulses of the first local clock signal being controllable by the master counter and a master synchronization stage configured to generate a synchronization signal synchronous with the first local clock signal, wherein the synchronization signal includes a corresponding pulse for each group of consecutive pulses of the first local clock signal formed by a number (N) of pulses, and a slave timing device including a slave oscillator stage configured to receive the reference signal and to generate a second main clock signal frequency-locked with the reference signal, a slave timing stage and a slave synchronization stage.
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