The present application provides a method of manufacturing a memory device having several word lines (WL) with reduced leakage. The method includes steps of providing a semiconductor substrate defined with an active area and including an isolation surrounding the active area; forming a first recess extending into the semiconductor substrate and across the active area; forming a first lining portion of a first insulating layer conformal to the first recess; disposing a first conductive material conformal to the first lining portion; forming a first conductive member surrounded by the first conductive material; disposing a second conductive material over the first conductive member to form a first conductive layer enclosing the first conductive member; and forming a first protruding portion of the first insulating layer above the first conductive layer and the first conductive member.