Invention Grant
- Patent Title: Cache line coherence state upgrade
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Application No.: US17514792Application Date: 2021-10-29
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Publication No.: US11836085B2Publication Date: 2023-12-05
- Inventor: Paul J. Moyer
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Volpe Koenig
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0891 ; G06F9/30 ; G06F12/0831
Abstract:
Techniques for performing cache operations are provided. The techniques include, recording an entry indicating that a cache line is exclusive-upgradeable; removing the cache line from a cache; and converting a request to insert the cache line into the cache into a request to insert the cache line in the cache in an exclusive state.
Public/Granted literature
- US20230136114A1 CACHE LINE COHERENCE STATE UPGRADE Public/Granted day:2023-05-04
Information query
