Invention Grant
- Patent Title: Semiconductor package and method comprising formation of redistribution structure and interconnecting die
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Application No.: US17412625Application Date: 2021-08-26
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Publication No.: US11848234B2Publication Date: 2023-12-19
- Inventor: Jiun Yi Wu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/76 ; H01L21/48 ; H01L21/768 ; H01L21/56 ; H01L25/00 ; H01L25/065

Abstract:
In an embodiment, a structure includes a core substrate, a redistribution structure coupled to a first side of the core substrate, the redistribution structure including a plurality of redistribution layers, each of the plurality of redistribution layers comprising a dielectric layer and a metallization layer, and a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component including a substrate, an interconnect structure on the substrate, and bond pads on the interconnect structure, the bond pads of the first local interconnect component physically contacting a metallization layer of a second redistribution layer, the second redistribution layer being adjacent the first redistribution layer, the metallization layer of the second redistribution layer comprising first conductive vias, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component.
Public/Granted literature
- US20230060716A1 Semiconductor Package And Method Public/Granted day:2023-03-02
Information query
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