Invention Grant
- Patent Title: Multi-gate device and related methods
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Application No.: US17662569Application Date: 2022-05-09
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Publication No.: US11854908B2Publication Date: 2023-12-26
- Inventor: Kuan-Ting Pan , Huan-Chieh Su , Zhi-Chang Lin , Shi Ning Ju , Yi-Ruei Jhan , Kuo-Cheng Chiang , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/02 ; H01L21/311 ; H01L27/092 ; H01L29/06 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
A method of fabricating a device includes forming a dummy gate over a plurality of fins. Thereafter, a first portion of the dummy gate is removed to form a first trench that exposes a first hybrid fin and a first part of a second hybrid fin. The method further includes filling the first trench with a dielectric material disposed over the first hybrid fin and over the first part of the second hybrid fin. Thereafter, a second portion of the dummy gate is removed to form a second trench and the second trench is filled with a metal layer. The method further includes etching-back the metal layer, where a first plane defined by a first top surface of the metal layer is disposed beneath a second plane defined by a second top surface of a second part of the second hybrid fin after the etching-back the metal layer.
Public/Granted literature
- US20220270934A1 MULTI-GATE DEVICE AND RELATED METHODS Public/Granted day:2022-08-25
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