Invention Grant
- Patent Title: Package substrate and method of fabricating the same and chip package structure
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Application No.: US17095744Application Date: 2020-11-12
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Publication No.: US11854961B2Publication Date: 2023-12-26
- Inventor: Yu-Hua Chen , Wei-Chung Lo , Tao-Chih Chang , Yu-Min Lin , Sheng-Tsai Wu
- Applicant: Industrial Technology Research Institute , Unimicron Technology Corp.
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute,Unimicron Technology Corp.
- Current Assignee: Industrial Technology Research Institute,Unimicron Technology Corp.
- Current Assignee Address: TW Hsinchu; TW Taoyuan
- Agency: JCIPRNET
- The original application number of the division: US15468087 2017.03.23
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L23/522 ; H01L23/498 ; H01L25/04 ; H01L21/48

Abstract:
A package substrate includes a substrate, an insulating protective layer and an interposer. The substrate has a first surface and a second surface opposing to the first surface. The substrate includes a plurality of first conductive pads embedded in the first surface. The insulating protective layer is disposed on the first surface of the substrate. The insulating protective layer has an opening for exposing the first conductive pads embedded in the first surface of the substrate. The interposer has a top surface and a bottom surface opposing to the top surface. The interposer includes a plurality of conductive vias and a plurality of second conductive pads located on the bottom surface. The interposer is located in a recess defined by the opening of the insulating protective layer and the first surface of the substrate. Each of the second conductive pads is electrically connected to corresponding first conductive pad.
Public/Granted literature
- US20210082810A1 PACKAGE SUBSTRATE AND METHOD OF FABRICATING THE SAME AND CHIP PACKAGE STRUCTURE Public/Granted day:2021-03-18
Information query
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